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Bit
10
Name
RTCC0TEN
Reset
0
Access
RW
Description
RTC Compare 0 Trigger Enable
Allows the LETIMER to be started on a compare match on RTC compare channel 0.
Value
0
1
Description
LETIMER is not affected by RTC compare channel 0
A compare match on RTC compare channel 0 starts the LETIMER if the LETIMER is not already started
9
COMP0TOP
0
RW
Compare Value 0 Is Top Value
When set, the counter is cleared in the clock cycle after a compare match with compare channel 0.
Value
0
1
Description
The top value of the LETIMER is 65535 (0xFFFF)
The top value of the LETIMER is given by COMP0
8
BUFTOP
0
RW
Buffered Top
Set to load COMP1 into COMP0 when REP0 reaches 0, allowing a buffered top value
Value
0
1
Description
COMP0 is only written by software
COMP1 is set to COMP1 when REP0 reaches 0
7
OPOL1
0
RW
Output 1 Polarity
Defines the idle value of output 1.
6
OPOL0
0
RW
Output 0 Polarity
Defines the idle value of output 0.
5:4
UFOA1
0x0
RW
Underflow Output Action 1
Defines the action on LETn_O1 on a LETIMER underflow.
Value
0
1
2
3
Mode
NONE
TOGGLE
PULSE
PWM
Description
LETn_O1 is held at its idle value as defined by OPOL1.
LETn_O1 is toggled on CNT underflow.
LETn_O1 is held active for one LFACLK LETIMER0 clock cycle on CNT underflow. The
output then returns to its idle value as defined by OPOL1.
LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1
3:2
UFOA0
0x0
RW
Underflow Output Action 0
Defines the action on LETn_O0 on a LETIMER underflow.
Value
0
1
2
3
Mode
NONE
TOGGLE
PULSE
PWM
Description
LETn_O0 is held at its idle value as defined by OPOL0.
LETn_O0 is toggled on CNT underflow.
LETn_O0 is held active for one LFACLK LETIMER0 clock cycle on CNT underflow. The
output then returns to its idle value as defined by OPOL0.
LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1
1:0
REPMODE
0x0
RW
Repeat Mode
Allows the repeat counter to be enabled and disabled.
Value
0
1
2
3
Mode
FREE
ONESHOT
BUFFERED
DOUBLE
Description
When started, the LETIMER counts down until it is stopped by software.
The counter counts REP0 times. When REP0 reaches zero, the counter stops.
The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when
REP0 reaches zero. Else the counter stops
Both REP0 and REP1 are decremented when the LETIMER wraps around. The
LETIMER counts until both REP0 and REP1 are zero
21.5.2 LETIMERn_CMD - Command Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 18) .
2011-04-12 - d0001_Rev1.10
301
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